AMD gx1 8.2.2 8.2.3 spec update free download

File name gx1_8.2.2_8.2.3_spec_update.pdf

AMD GeodeTM GX1 Processor Silicon Revision 8.2.2/8.2.3 Specification Update 1.0 Scope This document discusses known issues of the GeodeTM code number may change depending upon lot number, GX1 processor, silicon revisions 8.2.2 and 8.2.3. Table 1-1 date, etc. However, the "A" in the 5th character and the provides a summary of the issues. A detailed description of "A2" or "A3" are constant. Software can detect this revision each issue, its impact, and a recommended resolution/fix by reading the DIR1 Configuration register (see Configura- follow. tion registers in the GeodeTM GX1 Processor Series Data Book). The value read from DIR1 is 82h for both silicon To determine the silicon revision of the device, printed on revision 8.2.2 and 8.2.3. the chip (bottom-side of SPGA, top-side of EBGA) is the lot code number. The lot code number is a 10-digit number Note: This is revision 5.0 of this document. The change with an "A" in the 5th character followed by a space plus from revision 4.0 (dated May 2002) is the inclusion two additional characters: either "A2" denoting silicon revi- of silicon revision 8.2.3 (i.e., prevision revisions of sion 8.2.2 or "A3" denoting silicon revision 8.2.3 (e.g., the document pertained only to silicon revision V8SKA040AG A3). Note that the other characters of the lot 8.2.2). Table 1-1. Errata Summary Issue #1 Description 1 Incorrect CURRENT_IP field in SMI header 2 RSM truncates page-granular CS limit 3 SDRAM CAS latency of 1 not supported 4 VIH change from 2.0V to 2.1V on FLT# input 5 PCI AD bus floats too early on some target terminated cycles, not PCI 2.1 compliant 6 Memory writes in SMI handler could have A20 in their address cleared 7 Double fault handled as general protection fault 8 Call ESP does not work 9 PCI signal SERR# asserts for two clocks, not one 10 PCI signal LOCK# ignored 11 PCI signal PERR# is floated instead of driven high on deassertion 12 PCI REQs must not go active during reset 13 Call at beginning of Code Segment Call causes General Protection Fault 14 Self modifying code can cause PF 15 Time Stamp Counter stops during Suspend 17 WORD access to Port 23; Port 24 half of access goes off chip 19 Thermal diode does not work 20 PCI Master Latency Timer is broken 23 Video port limited to 133 MHz 24 Behavior of EFLAGS during INTR handling is not as expected 27